There are numerous methods for the detection and synchronization of data for use in noisy environments, and in particular techniques using integration for the detection of data in distinct state signal waveforms. One such method is presented in U.S. Pat. No. 3,864,583 which provides a pair of integration circuits forming an integrator for each state of the digital signal with the integrators being alternately actuated. In such prior art for a two-state signal, two integrators are provided with a clocking system to alternately actuate pairs of the integrators. A subsequent amplitude comparisons is then used to determine the date represented by the digital signal.
Phase-lock loop techniques are used to establish data synchronization by comparing input noisy digital data with a reference clock in a phase detector. The reference clock phase is adjusted to establish a minimum phase error with respect to the incoming data. Phase-lock techniques have the disadvantage of requiring many clock cycles to establish synchronization resulting in data being lost during the synchronization process.
U.S. Pat. No. 4,012,598 describes a receiver with a synchronizer which operates by selecting synchronized samples of a digital signal making use of a tap delay line. The most recent samples of the post signals are then stored and synchronized samples are detected by decoding sequence transitions.
U.S. Pat. No. 4,088,833 describes another multiphase sampling device used as a carrier detector in a multipoint communication system. A tapped delay line is used together with an amplitude difference decision circuit for providing an indication that the data signal has been received.
U.S. Pat. No. 3,602,826 describes an apparatus for detecting signal level variations in the presence of noise or other background phenomena. The signals are sequentially sampled according to a predetermined scanning sequence and processed in parallel channels on a synchronized element by element basis to derive an amplitude representation of the level variations occurring over maximum and minimum time intervals. These amplitude representations are then compared as an indication of whether they represent actual information signal or simply noise.
Other pertinent patents include U.S. Pat. Nos. 3,502,905; 3,602,826; 3,716,780; and 4,007,330.
Each of these prior art techniques generally have disadvantages: U.S. Pat. No. 4,012,598 does not provide integration thereby making the system sensitive to noise. U.S. Pat. No. 3,864,583 provides integration but does not address the problem of establishing clock data synchronization. U.S. Pat. Nos. 4,088,833 and 3,602,826 pertains to determining if a singal is present and does not address the problem of determining the information content contained in thes signal.